?2001 fairchild semiconductor corporation hgtg40n60c3 rev. b HGT1Y40N60C3D 75a, 600v, ufs series n-channel igbt with anti-parallel hyperfast diodes the HGT1Y40N60C3D is a mos gated high voltage switching device combining the best features of mosfets and bipolar transistors. the device has the high input impedance of a mosfet and the low on-state conduction loss of a bipolar transistor. the much lower on-state voltage drop varies only moderately between 25 o c and 150 o c. the igbt used is the development type ta49273. the diode used in anti-parallel with the igbt is the development type ta49063. the igbt is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as: ac and dc motor controls, power supplies and drivers for solenoids, relays and contactors. formerly developmental type ta49389. symbol features ? 75a, 600v, t c =25 o c 600v switching soa capability typicalfalltime ............... 100ns at t j =150 o c short circuit rating low conduction loss packaging jedec style to-264 ordering information part number package pkg. no. HGT1Y40N60C3D to-264 g40n60c3d note: when ordering, use the entire part number. c e g g c e collector (flange) fairchild corporation igbt product is covered by one or more of the following u.s. patents 4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713 4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027 data sheet december 2001
?2001 fairchild semiconductor corporation hgtg40n60c3 rev. b absolute maximum ratings t c =25 o c, unless otherwise specified HGT1Y40N60C3D units collectortoemittervoltage..............................................bv ces 600 v collector current continuous at t c =25 o c.........................................................i c25 75 a at t c =110 o c .......................................................i c110 40 a collectorcurrentpulsed(note1)........................................... i cm 300 a gatetoemittervoltagecontinuous.........................................v ges 20 v gatetoemittervoltagepulsed ........................................... v gem 30 v switching safe operating area at t j =150 o c(figure2)....................... ssoa 40aat600v power dissipation total at t c =25 o c.........................................p d 291 w power dissipation derating t c >25 o c.......................................... 2.33 w/ o c reversevoltageavalancheenergy ........................................e arv 100 mj operatingandstoragejunctiontemperaturerange........................t j ,t stg -55to150 o c maximumleadtemperatureforsoldering..................................... t l 260 o c short circuit withstand time (note 2) at v ge =12v..............................t sc 5 s short circuit withstand time (note 2) at v ge =10v..............................t sc 10 s caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress only rating and operatio nofthe device at these or any other conditions above those indicated in the operational sections of this specification is not implied. notes: 1. pulse width limited by maximum junction temperature. 2. v ce(pk) =360v,t j = 125 o c, r g =3 ?. electrical specifications t c =25 o c, unless otherwise specified parameter symbol test conditions min typ max units collector to emitter breakdown voltage bv ces i c =250 a, v ge =0v 600 - - v collector to emitter leakage current i ces v ce =bv ces t c =25 o c--250 a t c =150 o c--4.0ma collector to emitter saturation voltage v ce(sat) i c =i c110 , v ge =15v t c =25 o c-1.31.8v t c =150 o c-1.42.0v gate to emitter threshold voltage v ge(th) i c =250 a, v ce =v ge 3.1 4.5 6.0 v gate to emitter leakage current i ges v ge = 20v - - 250 na switching soa ssoa t j =150 o c, r g = 3 ?, v ge =15v, l=400 h v ce =480v 200 - - a v ce =600v 40 - - a gate to emitter plateau voltage v gep i c =i c110 ,v ce =0.5bv ces -7.2 - v on-state gate charge q g(on) i c =i c110 , v ce =0.5bv ces v ge = 15v - 275 302 nc v ge = 20v - 360 395 nc current turn-on delay time t d(on)i igbt and diode at t j =25 o c i ce =i c110 v ce =0.8bv ces v ge =15v r g =3 ? l=1mh test circuit (figure 19) -47 - ns current rise time t ri -30 - ns current turn-off delay time t d(off)i -185 - ns current fall time t fi -60 - ns turn-on energy (note 3) e on1 -850 - mj turn-on energy (note 3) e on2 -1.01.2mj turn-off energy (note 4) e off -1.01.8mj HGT1Y40N60C3D
?2001 fairchild semiconductor corporation hgtg40n60c3 rev. b current turn-on delay time t d(on)i igbt and diode at t j =150 o c i ce =i c110 v ce =0.8bv ces v ge =15v r g =3 ? l=1mh test circuit (figure 19) -41 - ns current rise time t ri -30 - ns current turn-off delay time t d(off)i - 360 450 ns current fall time t fi - 100 210 ns turn-on energy (note 3) e on1 -860 - j turn-on energy (note 3) e on2 -2.02.4mj turn-off energy (note 4) e off -2.5 4 mj diode forward voltage v ec i ec = 40a - 2.0 2.5 v diode reverse recovery time t rr i ec =40a,di ec /dt = 100a/ s - 50 65 ns i ec =1.0a,di ec /dt = 100a/ s - 38 40 ns thermalresistancejunctiontocase r jc igbt - - 0.43 o c/w thermalresistancejunctiontocase r jc diode - - 1.2 o c/w notes: 3. values for two turn-on loss conditions are shown for the convenience of the circuit designer. e on1 is the turn-on loss of the igbt only. e on2 istheturn-onlosswhenatypicaldiodeisusedinthetestcircuitandthediodeisatthesamet j as the igbt. the diode type is specified in figure 17. 4. turn-off energy loss (e off ) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (i ce = 0a). all devices were tested per jedec standard no. 24-1 method for measurement of power device turn-off switching loss. this test method produces the true total turn-off energy loss. typical performance curves unless otherwise specified figure 1. dc collector current vs case temperature figure 2. minimum switching safe operating area electrical specifications t c =25 o c, unless otherwise specified (continued) parameter symbol test conditions min typ max units t c , case temperature ( o c) i ce , dc collector current (a) 50 v ge =15v 25 75 100 125 150 50 30 10 20 40 0 60 70 80 package limit v ce , collector to emitter voltage (v) 100 700 75 0 i ce , collector to emitter current (a) 25 50 300 400 200 100 500 600 0 125 150 175 200 225 t j =150 o c, r g =3 ? ,v ge = 15v, l = 100 h HGT1Y40N60C3D
?2001 fairchild semiconductor corporation hgtg40n60c3 rev. b figure 3. operating frequency vs collector to emitter current figure 4. short circuit withstand time figure 5. collector to emitter on-state voltage figure 6. collector to emitter on-state voltage figure 7. turn-on energy loss vs collector to emitter current figure 8. turn-off energy loss vs collector to emitter current typical performance curves unless otherwise specified (continued) f max , operating frequency (khz) 2 i ce , collector to emitter current (a) 10 5 1 100 80 10 40 f max1 =0.05/(t d(off)i +t d(on)i ) r ?jc =0.43 o c/w, see notes p c = conduction dissipation (duty factor = 50%) f max2 =(p d -p c )/(e on2 +e off ) t c v ge 110 o c 10v 15v 75 o c 110 o c 75 o c 10v t j = 150 o c, r g =3 ? ,l=1mh,v ce = 480v 15v v ge , gate to emitter voltage (v) i sc , peak short circuit current (a) t sc , short circuit withstand time ( s) 10 11 12 13 14 15 4 8 12 16 250 375 500 625 750 t sc i sc 20 v ce = 360v, r g =3 ? ,t j = 125 o c 012 v ce , collector to emitter voltage (v) i ce , collector to emitter current (a) 0 50 100 34 250 200 150 300 567 pulse duration = 250 s duty cycle <0.5%, v ge =10v t c = 150 o c t c =-55 o c t c =25 o c i ce , collector to emitter current (a) v ce , collector to emitter voltage (v) 150 200 250 300 023 0 50 14 100 t c =25 o c t c =150 o c t c =-55 o c duty cycle <0.5%, v ge = 15v pulse duration = 250 s duty cycle <0.5%, v ge = 15v pulse duration = 250 s e on2 , turn-on energy loss (mj) 10 6 i ce , collector to emitter current (a) 8 4 2 30 10 50 40 20 0 12 0 r g =3 ? ,l=1mh,v ce = 480v t j =25 o c, t j = 150 o c, v ge =10v t j =25 o c, t j = 150 o c, v ge =15v 60 70 80 i ce , collector to emitter current (a) e off , turn-off energy loss (mj) 0 1 50 40 10 20 30 0 2 5 4 3 t j = 150 o c; v ge = 10v or 15v t j =25 o c; v ge = 10v or 15v r g =3 ? ,l=1mh,v ce = 480v 60 70 80 6 HGT1Y40N60C3D
?2001 fairchild semiconductor corporation hgtg40n60c3 rev. b figure 9. turn-on delay time vs collector to emitter current figure 10. turn-on rise time vs collector to emitter current figure 11. turn-off delay time vs collector to emitter current figure 12. fall time vs collector to emitter current figure 13. transfer characteristic figure 14. gate charge waveforms typical performance curves unless otherwise specified (continued) i ce , collector to emitter current (a) t di , turn-on delay time (ns) 30 10 20 30 0 35 40 50 45 55 60 80 65 r g =3 ? ,l=1mh,v ce = 480v t j =25 o c, t j = 150 o c, v ge = 10v t j =25 o c, t j = 150 o c, v ge = 15v 60 40 70 50 70 75 i ce , collector to emitter current (a) t ri , rise time (ns) 50 0 100 150 250 200 300 10 20 30 080 60 40 70 50 r g =3 ? ,l=1mh,v ce = 480v t j =25 o candt j = 150 o c, v ge = 15v t j =25 o c, t j = 150 o c, v ge =10v 350 400 10 20 50 0 400 40 30 100 250 150 200 300 350 i ce , collector to emitter current (a) t d(off)i , turn-off delay time (ns) r g =3 ? ,l=1mh,v ce = 480v t j = 150 o c, v ge =10v,v ge = 15v t j =25 o c, v ge = 10v, v ge = 15v 60 70 80 i ce , collector to emitter current (a) t fi ,falltime (ns) 20 80 120 160 40 60 100 140 r g =3 ? ,l=1mh,v ce =480v t j =25 o c, v ge = 10v or 15v t j =150 o c, v ge =10v,v ge =15v 10 20 50 040 30 60 70 80 i ce , collector to emitter current (a) 0 50 100 150 5 78910 6 v ge , gate to emitter voltage (v) 11 200 250 300 4 pulse duration = 250 s duty cycle <0.5%, v ce = 10v t c =25 o c t c =-55 o c t c = 150 o c q g , gate charge (nc) 0 8 10 6 4 2 0 50 100 200 v ge , gate to emitter voltage (v) 250 300 150 12 14 16 v ce = 200v v ce = 600v v ce = 400v i g(ref) =1ma,r l =7.5 ? ,t c =25 o c HGT1Y40N60C3D
?2001 fairchild semiconductor corporation hgtg40n60c3 rev. b figure 15. vfdiode forward current vs forward voltage drop figure 16. recovery times vs forward current figure 17. capacitance vs collector to emitter voltage figure 18. normalized transient thermal response, junction to case typical performance curves unless otherwise specified (continued) 25 o c 100 o c 0.5 1.0 1.5 2.5 3.0 i ec , forward current (a) v ec , forward voltage (v) 02.0 150 o c 1 10 200 60 40 30 20 10 0 t r , recovery times (ns) i ec , forward current (a) 50 151030 t rr t a t b t c =25 o c, di ec /dt = 100a/ s v ce , collector to emitter voltage (v) 0 5 10 15 20 25 0 c, capacitance (nf) 2.5 5.0 7.5 10.0 12.5 c ies c oes c res 15.0 frequency = 1mhz t 1 t 2 single pulse 0.5 0.2 0.1 0.05 0.02 t 1 , rectangular pulse duration (s) 10 -2 10 -1 10 0 10 -5 10 -3 10 -2 10 -1 10 0 10 -4 z jc , normalized thermal response 0.01 p d duty factor, d = t 1 /t 2 peak t j =(p d xz jc xr jc )+t c HGT1Y40N60C3D
?2001 fairchild semiconductor corporation hgtg40n60c3 rev. b test circuit and waveforms figure 19. inductive switching test circuit figure 20. switching test waveforms r g =3 ? l=1mh v dd = 480v + - rhrp3060 c t fi t d(off)i t ri t d(on)i 10% 90% 10% 90% v ce i ce v ge e off e on2 HGT1Y40N60C3D
?2001 fairchild semiconductor corporation hgtg40n60c3 rev. b handling precautions for igbts insulated gate bipolar transistors are susceptible to gate- insulation damage by the electrostatic discharge of energy through the devices. when handling these devices, care should be exercised to assure that the static charge built in the handler?s body capacitance is not discharged through the device. with proper handling and application procedures, however, igbts are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. igbts can be handled safely if the following basic precautions are taken: 1. prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as ?eccosorbd? ld26? or equivalent. 2. when devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. tips of soldering irons should be grounded. 4. devices should never be inserted into or removed from circuits with power on. 5. gate voltage rating - never exceed the gate-voltage rating of v gem . exceeding the rated v ge can result in permanent damage to the oxide layer in the gate region. 6. gate termination - the gates of these devices are essentially capacitors. circuits that leave the gate open-circuited or floating should be avoided. these conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. gate protection - these devices do not have an internal monolithic zener diode from gate to emitter. if gate protection is required an external zener is recommended. operating frequency information operating frequency information for a typical device (figure 3) is presented as a guide for estimating device performance for a specific application. other typical frequency vs collector current (i ce ) plots are possible using the information shown for a typical unit in figures 5, 6, 7, 8, 9 and 11. the operating frequency plot (figure 3) of a typical device shows f max1 or f max2 ; whichever is smaller at each point. the information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. f max1 is defined by f max1 = 0.05/(t d(off)i +t d(on)i ). deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. other definitions are possible. t d(off)i and t d(on)i are defined in figure 20. device turn-off delay can establish an additional frequency limiting condition for an application other than t jm .t d(off)i is important when controlling output ripple under a lightly loaded condition. f max2 is defined by f max2 =(p d -p c )/(e off +e on2 ). the allowable dissipation (p d ) is defined by p d =(t jm -t c )/r jc . the sum of device switching and conduction losses must not exceed p d . a 50% duty factor was used (figure 3) and the conduction losses (p c ) are approximated by p c =(v ce xi ce )/2. e on2 and e off are defined in the switching waveforms shown in figure 20. e on2 is the integral of the instantaneous power loss (i ce xv ce ) during turn-on and e off is the integral of the instantaneous power loss (i ce xv ce ) during turn-off. all tail losses are included in the calculation for e off ; i.e., the collector current equals zero (i ce =0). HGT1Y40N60C3D
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?
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